Senoir Design Project
Guidance for undergraduate senior design projects is a pivotal component of our UPWARDS project, consistently provided by Ph.D. students from MICS and Dr. Luke Lester. This essential practical experience is designed to immerse students in the cutting-edge developments of the semiconductor industry and academia, enhancing their understanding and skills during their critical final year.
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Muhammad Farhan Azmine, one of the Ph.D students from MICS@VT lab, holds the weekly discussion with the undergraduate students for their senoir design project.
On April 17th, the Major Design Experience (MDE) Expo was successfully held at Virginia Tech. All the senoir design projects are presented during this event, including the Micron-sponsored projects.
"A Germanium Laser for Future Quantum Technologies: Design and Implementation"
This project investigates the ε-Ge/InGaAs quantum well laser structure through numerical solvers and integrates laboratory-grown epitaxial techniques and characterization analysis.
The study reveals that InGaAs not only serves as an effective strain template for Ge, addressing defect issues caused by lattice mismatch, but also allows for the optimization of lattice mismatch through the adjustment of indium content. Also, the InGaAs layer is responsible for providing optical waveguiding and the required tensile strain for the quantum well laser.
Tensile strained Ge-on-InGaAs QW lasers are proven to be promising for varying wavelength applications in the MIR region for integrated photonics. And it shows that adaptative design reveals an efficient approach for implementation of a tunable tensile strained Ge laser for Si photonics. The research relates the compounding effects of Indium composition, quantum well thickness, and cavity thickness to optimize optical confinement for individualized structures.
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"Simulation of Thermal Transport in Resistive Memory Arrays"
This project explores the potential of Resistive RAM (ReRAM) as a leading-edge solution in the field of non-volatile memory technology.
Capitalizing on its higher density, faster switching speeds, and lower power consumption, ReRAM stands as a formidable alternative to conventional memory systems. However, the innovation is not without its challenges. The project addressed the significant issue of thermal buildup, which can lead to data loss and irreversible damage within ReRAM devices.
By analyzing the underlying mechanisms of the 'memristor' and investigating methods to mitigate heat accumulation, this project aims to harness the advantages of ReRAM while overcoming its primary limitation, setting the stage for its safe and efficient deployment in computing systems.
On November 20th, 2024, the Major Design Experience (MDE) Expo for this semeter was successfully held at Virginia Tech.
This project is under the instruction of Dr. Walling from our MICS lab. The two PhD students, Woojun Lee and Jungmin Lee also provided necessary help to the group.